VHDL RAM and Quartus 2 University Waveform Editor/Simulator Output Verification

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Technically, this issue is more computer engineering than electronic, but that option was not available.


I need help testing my VHDL RAM code using the Quartus 2 waveform simulator. I have the compiled the code successfully but now I am trying to verify the outputs using the waveform editor in Quartus 2 but it doesn’t matter what address or data inputs I use, it only produces zeroes on the outputs. What am I doing wrong?


Please see the attached. This basically explains the problem.


All you need to do is create a project in Quartus 2 (so yes you need the Quartus 2 software) called TDPRAM, open a new VHDL file, cut and paste the attached VHDL file, called TDPRAM, I created, compile it successfully, then run the University Waveform editor, add the inputs and outputs using node finder, change the inputs bits, and run the simulation to get the required output. You need to test both set of inputs and both outputs. I need this asap please. I also have another document explaining the design I will send next. Thank you.


The attached documents show the design used to create the VHDL code (TDPRAM file), the VHDL code itself, and sreen shots of the issue.


Please help I need this asap!

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